Teaching Scheme

Examination Scheme

Lectures : 3 hrs/week

Mid-Sem – 30, Assignments, Quiz -20

End-Sem Exam- 50.

Unit 1                                                                                  

[08 Hrs]

Digital Signal Processor: Harvard architecture and modified Harvard architecture. Introduction to fixed point and floating point DSP processors, architectural features, Computational units, bus architecture and memory architecture, data addressing, address generation unit, programme control, programme sequencer, pipelining, interrupts, features of external interfacing, on-chip peripherals, hardware timers, host interface port, clock generator, SPORT

Unit 2                                                                                  

[08 Hrs]

Programming of DSP Processor

Addressing modes, Instruction set, Programming tools such as DSP Assembler, IDE environments like CCS for DSP chip or visual DSP for Analog DSP chips, programming using DSP processor

Unit 3                                                                                   

[08 Hrs]

Frequency Response Characteristics of LTI system Frequency response of a system to complex exponential and sinusoidal signals, steady state and transient response to sinusoidal inputs signals, computation of frequency response functions. Design of LTI systems as frequency selective filters.

Finite Impulse Response, Infinite Impulse response filter structures Structures for FIR filters : direct , cascade, frequency sampling and lattice. Structure of IIR filters: direct, cascade, parallel, lattice. Effect of finite word length in Digital filters

Unit 4                                                                                  

[08 Hrs]

Discrete Fourier transform                                                                   

Frequency domain sampling, Discrete Fourier transform (DFT): DFT pair, properties of DFT, frequency response analysis of signals using the DFT, linear filtering based on DFT, Fast Fourier tram(FFT); Introduction, Radix -2 decimation in time FFT algorithm, Radix-2 decimation in frequency algorithm, inverse of  FFT

Unit 5                                                                                  

[08 Hrs]

Finite Impulse Response Filters

Introduction to finite impulse response filters, linear phase filters, symmetric & anti –symmetric filters, Design of FIR filter: windowing method, analysis of different types of windows, frequency sampling method, optimal equi-ripple, FIR differentiators

Unit 6                                                                                  

[08 Hrs]

Infinite Impulse Response Filter

Introduction to Infinite Impulse Response filter, Butterworth, Chebyshev approximation. Design of IIR filters: Impulse invariant method, bilinear transformation, approximation derivative method, IIR filter design using least square method: Pade approximation. Frequency transformations: low pass to high pass, band pass, band reject.

Text Books:                                                                  

·         DSP Principles, algorithms and applications- Proakis, Manolakis  PHI

·         DSP, Oppenheium, Schalfer

·         DSP and Applications with TMS320C673 & TMS320C716 DSK by DR Rulpph Chassaing

·         DSP filter analysis &  Design by A Antoniou:” McGraw Hill 1979

·         DSP applications using C & TMS320C6X DSK by Rulph Chassaing by WILAT publication

·         DSP Implementation using DSP microprocssors with examples from TMS320C54XX, Avtar singh, s. srinivasan

Reference Books:

·         TMS320C67XX DSP Reference set, Vol. 2 1999

·         DSP processor fundamental architecture and features, Piscataway, N.J.IEEE, 1997, Lapsley p. Bier J, Shoham A, Lee E.A